ESP32 - Enabling PSRAM
ESP32 - Enabling PSRAM
The ESP32 has a few hundred kilobytes of internal RAM, residing on the same die as the rest of the chip components. It can be insufficient for some purposes, so ESP32 has the ability to use up to 4 MB of virtual addresses for external PSRAM (Psuedostatic RAM) memory. The external memory is incorporated in the memory map and, with certain restrictions, is usable in the same way as internal data RAM.
The method to enable this feature is using 'Menuconfig' & selecting the following options:
(Top) → Component config → ESP32-specific → Support for external, SPI-connected RAM
There are a number of methods of utilizing this external RAM as outlined in the Espressif documentation but perhaps the most useful method is either:
Add External RAM to the Capability Allocator
Provide External RAM via malloc()
Using option 1 allows a running application to allocate memory using a special call, heap_caps_malloc(size, MALLOC_CAP_SPIRAM)), & release using the free() call. This method could be useful for allocating large arrays, for example when using TensorFlow.
Option 2 allows an application to use the more usual malloc() call & release using the same free() call. The build can be configured to try & allocate memory requests over a certain size to external RAM.
After enabling these the user may find themselves facing new, surprising, build errors such as:
section `.iram0.text' will not fit in region `iram0_0_seg'
IRAM0 segment data does not fit.
region `iram0_0_seg' overflowed by 8876 bytes
Code which fitted previously now doesn't seem to! It turns out this is normally due to workarounds introduced by Espressif to mitigate against certain silicon bugs in Rev 1 & 2 of the ESP32 chip, as detailed. These workarounds disable certain ROM code & hence introduce the requirement for more RAM code.
To solve this issue check your chip revision using the tool provided by Espressif (part of the idf suite):
esptool flash_id
Hopefully you see something like:
Detecting chip type... ESP32
Chip is ESP32D0WDQ5 (revision 3)
In which case you can set the minimum chip revision in Menuconfig as follows:
(Top) → Component config → ESP32-specific → Minimum Supported ESP32 Revision -> Rev 3
Once enabled the build errors should be resolved & the PSRAM now available.